1. Field of the Invention
The present invention relates to I/O devices and more particularly pertains to a new I/O pin array for representing various data with a matrix of extendible pins and further providing a means of inputting data via the pins.
2. Description of the Prior Art
The use of I/O devices is known in the prior art. More specifically, I/O devices heretofore devised and utilized are known to consist basically of familiar, expected and obvious structural configurations, notwithstanding the myriad of designs encompassed by the crowded prior art which have been developed for the fulfillment of countless objectives and requirements.
Known prior art I/O devices or the like include U.S. Pat. No. 4,514,814; U.S. Pat. No. 4,761,534; U.S. Pat. No. 4,705,401; U.S. Pat. No. 4,051,483; U.S. Pat. No. Des. 256,784; and U.S. Pat. No. 5,337,149; U.S. Pat. No. 5,262,778; U.S. Pat. No. 5,412,420; U.S. Pat. No. 5,412,880; U.S. Pat. No. 5,189,806; U.S. Pat. No. 5,148,377; U.S. Pat. No. Des. 325,572; and U.S. Pat. No. 4,833,630.
In these respects, the I/O pin array according to the present invention substantially departs from the conventional concepts and designs of the prior art, and in so doing provides an apparatus primarily developed for the purpose of representing various data with a matrix of extendible pins and further providing a means of inputting data via the pins.